As part of this group, you’ll gain experience in working with real hardware, learn from industry experts, and take part in end-to-end chip development.

Responsibilities

• Assist in RTL design and implementation of logic blocks for AI acceleration and networking hardware
• Support verification activities including testbench development, simulation, and debugging
• Contribute to synthesis, timing analysis, and emulation efforts
• Work with senior engineers to resolve design and integration issues
• Participate in design reviews and documentation of logic modules

Requirements

• Last year student/Graduate of Electrical Engineering or Computer Engineering from one of Israel’s top five universities with an average grade of 80 or above- Full time
• Strong knowledge of digital logic design principles
• Familiarity with hardware description languages (Verilog/SystemVerilog or VHDL)
• High level of determination, curiosity, and self-learning ability — eager to tackle new challenges and acquire new skills

Advantages / Preferred Skills

• Experience with RTL design and simulation tools (e.g., ModelSim, VCS, Questa)
• Familiarity with FPGA prototyping and synthesis tools
• Understanding of computer architecture concepts (pipelines, memory hierarchies, clock domains)
• Exposure to verification methodologies (UVM, constrained random testing)
• Knowledge of scripting languages (Python, Perl, or TCL) for automation

Please add grade sheets to the application.