(www.enchargeai.com)
Staff Engineer, Static Timing Analysis (STA)
Location: Greater Bengaluru Area (Hybrid-2 days office/3 days home)
About Company:
EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems.
Role: Staff Engineer, Static Timing Analysis (STA)
We are looking for a visionary Staff
Engineer
to spearhead Encharge AI Timing leadership role.
This isn't just an execution role; we need a technical trailblazer who can navigate the complexities of advanced process nodes (2nm/3nm and beyond) while fostering a culture of innovation and rigorous critical thinking.
As the India Timing Lead, you will bridge the gap between architectural intent and silicon reality, ensuring our high-performance designs meet the most stringent timing, power, and reliability targets.
Key Responsibilities
Required Skills & Expertise
Category
Requirements
Core STA
Deep expertise in
Signal Integrity (SI)
, Crosstalk, OCV/POCV/LVF, and Constraint Management (SDC).
Tooling
Mastery of
Cadence Tempus
(ECO, Tempus Stylus, and distributed timing).
Analysis
Proficiency in high-speed interface timing (DDR, PCIe) and low-power multi-voltage domains.
Scripting
Advanced
Tcl/Python
skills to automate complex flows and develop custom analysis tools.
Problem Solving
Proven ability to debug complex timing paths and offer creative ECO solutions that balance Power, Performance, and Area (PPA).
Mindset & Qualifications
- Critical Thinker:
You don't just follow a checklist; you challenge existing flows to find efficiencies and hidden risks.
- Leadership Presence:
7+ years of experience in VLSI, with a clear track record of leading high-impact teams in India.
- Education:
M.Tech in Electrical/Electronic Engineering or a related field.
- Communication:
Ability to distill complex technical hurdles into actionable insights for global stakeholders.
Contact
Uday
muday_bhaskar@yahoo.com
Mulya Technologies
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