Required Qualifications: (What You Bring)

• Master's degree in Computer Science, Electrical Engineering, or a closely related field.
• 6-12 years of experience in RTL design, verification, or a combination of both, with a passion for customer-facing roles.
• Proficiency in Verilog/SystemVerilog and scripting languages like Python for automation
• Experience with digital design EDA tools such as AMD (Vivado), Altera/Intel (Quartus) ecosystems or ASIC physical design chains, including SoC and IP integrations
• Excellent written and verbal communication skills, with a strong ability to translate complex technical information into clear, actionable guidance.
• A consultative, problem-solving mindset and a passion for helping others succeed.
• Comfortable working in a dynamic, research-heavy AI-oriented startup environment

Bonus Points The following items are not required but are great bonuses:

• Personal projects showcasing innovation, creativity, and continuous learning
• Knowledge of open-source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)
• Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc) and with EDA tools and their application in real-world design flows.
• Demonstrated coursework or project experience in machine learning and/or deep learning
• Prior experience in a field application engineering or customer success role.