Company Description

Chiplogic Technologies, established in 2018, is an IP and Product Engineering Services company specializing in Semiconductor, Systems, IoT, and AI/ML solutions. Offering high-quality and dependable services, Chiplogic delivers end-to-end semiconductor design and system solutions, ranging from concept to silicon. The company also provides innovative IoT solutions and AI/ML services with its proprietary VISARD™ (Video Synthesis And Real-time Dynamics) framework. Chiplogic is committed to driving technological advancements and delivering reliable engineering solutions to global partners.

Role Description

We are seeking an experienced and highly skilled Staff Analog Circuit Design Engineer to lead the design and development of high-performance analog and mixed-signal circuits for next-generation semiconductor products. The ideal candidate brings deep technical expertise, strong ownership, and proven silicon success in designing advanced analog IPs. You will work closely with cross-functional teams and mentor junior members while driving complex circuits from architecture to production.

Responsibilities

• Lead the architecture, transistor-level design, and development of analog and mixed-signal circuits such as PLLs, bandgaps, LDOs, ADCs, DACs, oscillators, amplifiers, regulators, and sensor interfaces.
• Own the complete design cycle: specifications → circuit design → simulation → layout guidance → post-layout verification → silicon validation.
• Perform in-depth simulation analysis including PVT corners, Monte Carlo, jitter, noise, linearity, stability, and reliability.

Skills

• Bachelor’s or Master’s degree in Electrical/Electronics Engineering.
• 8+ years of experience in analog/mixed-signal circuit design.
• Strong expertise in designing circuits such as PLL, ADC, DAC, LDO, bandgap reference, op-amps, comparators, bias circuits, and oscillators.
• Proficiency with EDA tools: Cadence Virtuoso, Spectre, HSPICE, Eldo, or equivalent.
• Solid understanding of CMOS device physics, mismatch, noise, reliability, device modeling, and advanced process node behavior.
• Proven experience in post-layout verification, parasitic analysis, and optimization.
• Hands-on experience with lab equipment and silicon bring-up (oscilloscopes, VNAs, SMUs, spectrum analyzers, etc.).

Qualifications

• Experience working in advanced nodes (28nm, 16nm, 7nm, or below).
• Knowledge of high-speed or RF-related analog IPs (CDR, SerDes front-end, VCOs).
• Familiarity with AMS verification methodologies and co-simulation environments.
• Track record of successful tape-outs and mass-production support.
• Experience guiding or leading small design teams.