Proxelera

Proxelera helps semiconductor teams reduce risk and accelerate silicon delivery with end-to-end product engineering. It delivers ASIC/SoC design, RTL, verification, FPGA prototyping, and embedded software, including IP design and post-silicon validation. The company performs physical design, fab interfacing, and silicon productization, leveraging SystemVerilog, UVM, Python, C/C++, Linux, and Yocto. It supports collaboration with hardware teams and offers outcome-based engagements and royalty-based models, serving global semiconductor customers. With over 190 engineers across Bengaluru and Mysuru and global sales in the USA and Japan, Proxelera scales turnkey chip design projects.

AI ChipsChip DesignIP DesignNetworking SiliconProduct EngineeringSemiconductorsSilicon ValidationSystem Softwareproxelera.com

Proxelera

AI ChipsChip DesignIP DesignNetworking SiliconProduct EngineeringSemiconductorsSilicon ValidationSystem Softwareproxelera.com

HQBengaluru, IN

Team Size124

Open Jobs65

Total Funding-

Latest FundraiseUnknown

Join the Team

Sr. ASIC Design Verification Engineer – TB Architecture

On-SiteBengaluru, Karnataka, IN

On-Site • Bengaluru, Karnataka, IN

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DevOps Engineer

ContractLondon, GB

Contract • London, GB

Technical Writer

InternshipJerusalem

Internship • Jerusalem

Frontend Developer

Full-timeBerlin, DE

Full-time • Berlin, DE

AI Researcher

Part-timeBelgrade, RS

Part-time • Belgrade, RS

Technical Writer

Part-timeBelgrade, RS

Part-time • Belgrade, RS

Backend Developer

ContractCambridge, GB

Contract • Cambridge, GB

Hi - We are looking for a senior ASIC Design Verification engineer who owns testbench architecture, not just tests. This role is about building scalable UVM environments and driving SoC verification from spec to silicon.

Experience: 8+ years (ASIC only)

Location Bangalore

What you will do

Architect and build scalable UVM testbenches from scratch at subsystem and SoC level

Own testbench architecture: structure, reuse, scalability, maintainability

Define verification strategy and test plans from specs and micro-architecture

Develop tests, scoreboards, checkers, SVA, and coverage models

Drive functional, code, and assertion coverage closure

Lead SoC-level verification: IP integration, coherency, low power, resets/boot

Debug complex issues and support pre/post-silicon correlation

What we need

8+ years of hands-on ASIC verification (FPGA/emulation-only doesn’t count)

Strong ownership of TB architecture, not just test writing

Multiple production ASIC tapeouts (SoC or large subsystems)

Expert in SystemVerilog, UVM, SVA

Experience with AXI/ACE, DDR, PCIe, coherency, memory fabrics

Proven strength in test planning, closure, and deep debug

Cheers,

Shahid