The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. Overview: We are looking for a dynamic leader who will play a critical role in establishing and driving the buildout of its India hardware organization. Reporting directly to the C-suite, this individual will lead efforts to recruit a world-class team of hardware and firmware engineers, technical leaders, and executives; oversee technical and strategic operations in India; work with the global leadership team to drive strategic growth domestically and globally;

and serve as the primary liaison between the India organization and the rest of global leadership. The ideal candidate is a seasoned executive with a strong background in technology, silicon chip design, software, team building, and operations management. Key Responsibilities: Team Building & Leadership: • Develop and execute a comprehensive strategy to establish presence in India. • Recruit top talent across technical (hardware and firmware), operational, and additional support functions to build a high-performing India team. • Establish the AI silicon team for in India, focusing on acquiring top talent across Analog Design, Architecture, Digital Design, Digital Verification (DV), Physical Design, and Bring-up.

• Foster a collaborative and innovative culture that aligns with global values. Technical Leadership Growth: • Grow technical teams that can contribute to our roadmap and hardware & software products. • Engage deeply in the development and definition of foundational chip architectures , to be well positioned to define and drive future product opportunities. • Lead the India team to collaborate jointly with team-members across world-wide sites with the objective of enabling multiple product and test-chip silicon tapeouts.

We are expected to have at least 1 tapeout every year for the next few years – as we ramp up silicon products across different technology nodes and markets. • Building out our IP portfolio across multiple technology nodes – enabling us to license key technologies to adjacent markets including automotive, AR/VR/XR, IoT and datacenters. Technical Execution of Physical Design and Verification (optional in case of PDexpertise):

• Drive technical execution across the entire ASIC design flow with specific emphasis on Physical design • Establish physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing closure • Oversee physical implementation, physical verification, timing closure, documentation and tapeout of complex high performance mixed-signal SOCs (System on a Chip). • Managing PD resources (employees and contractors), to deliver on aggressive tapeout schedules. • Collaborate with a cross-disciplined, multi-site team to identify the issues, get buyin on proposed solutions, and implement the solutions in time for the team to execute to schedule

. Qualification and skills: • Hold a BSEE (MSEE preferred) or equivalent experience • 27+ years of experience in large VLSI physical design implementation with exposure to advanced nodes down to 3nm technology. • Successful track record of delivering designs to high volume production. • Familiarity with industry standard P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys (ICC2/DC/PT/STAR-RC/ICV), Cadence (Innovus, Tempus, Voltus ) and/or Mentor Graphics. • Experience with the integration of custom analog IP macros such as Serdes, custom memories, CAMs, high-speed IO drivers, PLLs etc. • Confirmed prior experience in timing closure, clock/power distribution and analysis, RC extraction and correlation, place/ route and tapeout solutions.

• Strong analytical and debugging skills required • Deep understanding of low power implementation initiatives and techniques. Operational Management: • Oversee all aspects of India operations, including office setup, infrastructure, compliance, and vendor management. • Ensure efficient and effective operational processes to support business goals and maintain global alignment. • Develop and manage budgets, ensuring cost efficiency and financial accountability.

Strategic Growth: • Identify and pursue growth opportunities in India’s AI and semiconductor ecosystems. • Collaborate with global leadership to align India’s strategic initiatives with corporate objectives. • Represent us in industry events, fostering partnerships and enhancing brand presence in India. Stakeholder Engagement: • Serve as the primary point of contact for India operations with regular updates to global leadership. • Build relationships with government entities, industry bodies, and academic institutions to support growth and talent acquisition. • Navigate India’s regulatory and business landscape, ensuring compliance with all applicable laws and standards.

Contact:

Uday

Mulya Technologies

muday_bhaskar@yahoo.com

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