We are seeking a Senior Director of Digital Hardware Verification to lead and expand our SoC design verification organization in Bangalore. This is a hands-on technical leadership role responsible for scaling a world-class design verification team, driving verification across multiple SoC programs, and collaborating closely with architecture, RTL design, physical design, firmware, and software teams. You will play a pivotal role in driving verifying for ultra-efficient, next-generation AI compute platforms.

Responsibilities

• Lead and mentor a high-performing team of SoC design verification engineers across IP verification, SoC/subsystem verification and platform verification.
• Own IP, subsystem, and full-chip design verification from spec through tape-out.
• Partner closely with Architecture, RTL design, PD, Firmware, and Post-Si teams to realize high-quality silicon on aggressive schedules.
• Drive project planning, resourcing, task allocation, and execution tracking for verification teams across multiple concurrent programs.
• Recruit, develop, and retain top-tier engineering talent.
• Establish and enforce best practices for design verification to achieve high quality designs
• Develop design verification architecture, test plans and other verification documents. Plan for coverage and other quality metrics.
• Guide and oversee test bench components, checker, monitor, scoreboard development, low-power verification, equivalence checking, hardware prototyping and other verification technique.
• Participate in design, micro-architecture, DV, and PD reviews to ensure there are no gaps in design verification.
• Coordinate seamlessly with global teams across geographies to ensure verification convergence and alignment.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 20–25 years of experience in SoC/ASIC development with at least 8+ years in technical leadership or engineering management.
• Proven expertise in front-end design verification using UVM or other such verification frameworks.
• Deep expertise in coverage driven verification, equivalence checking, hardware prototyping for verification, and other state of the art verification methodologies.
• Broad experience with SoC and full chip verification, clock/power/reset verification, low power verification system bring up and firmware verification.
• Experience with UCIe or similar chiplet protocols, PCIe and/or CXL.
• Good understanding of interconnect protocols (AXI/CHI), memory systems (DDR, HBM), and caching/coherency architectures.
• Experience with ML/AI accelerators, GPUs, CPUs (RISC-V or ARM), and advanced low-power design techniques.
• Some experience in front-end micro-architecture and RTL design is a big plus.
• Exceptional communication, leadership, and cross-functional collaboration skills.
• Experience leading and collaborating with geographically distributed teams.

Contact:

Uday

Mulya Technologies

muday_bhaskar@yahoo.com

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