
Proxelera helps semiconductor teams reduce risk and accelerate silicon delivery with end-to-end product engineering. It delivers ASIC/SoC design, RTL, verification, FPGA prototyping, and embedded software, including IP design and post-silicon validation. The company performs physical design, fab interfacing, and silicon productization, leveraging SystemVerilog, UVM, Python, C/C++, Linux, and Yocto. It supports collaboration with hardware teams and offers outcome-based engagements and royalty-based models, serving global semiconductor customers. With over 190 engineers across Bengaluru and Mysuru and global sales in the USA and Japan, Proxelera scales turnkey chip design projects.

Proxelera helps semiconductor teams reduce risk and accelerate silicon delivery with end-to-end product engineering. It delivers ASIC/SoC design, RTL, verification, FPGA prototyping, and embedded software, including IP design and post-silicon validation. The company performs physical design, fab interfacing, and silicon productization, leveraging SystemVerilog, UVM, Python, C/C++, Linux, and Yocto. It supports collaboration with hardware teams and offers outcome-based engagements and royalty-based models, serving global semiconductor customers. With over 190 engineers across Bengaluru and Mysuru and global sales in the USA and Japan, Proxelera scales turnkey chip design projects.
We’re hiring an RTL Design Engineer who can own complex SoC or large subsystem blocks end-to-end. You’ll define micro-architecture from specs, develop clean SystemVerilog/Verilog RTL, and drive integration, timing, power, and area closure with PD teams. Expect deep involvement through design reviews, bug closure, and silicon bring-up.
You should bring 8+ years of hands-on ASIC RTL experience with multiple production tapeouts, strong micro-architecture skills, AMBA protocols, low-power design, and clock/reset expertise. Solid exposure to DFT, synthesis constraints, ECO flows, and cross-team collaboration is essential.
Bonus: experience with coherency, memory subsystems, DDR/PCIe, security blocks, SVA, or performance/power analysis. FPGA-only, lint/CDC-only, or management-only backgrounds won’t meet the bar.
If you want real ownership and real silicon impact, this role is worth your time.