
Proxelera helps semiconductor teams reduce risk and accelerate silicon delivery with end-to-end product engineering. It delivers ASIC/SoC design, RTL, verification, FPGA prototyping, and embedded software, including IP design and post-silicon validation. The company performs physical design, fab interfacing, and silicon productization, leveraging SystemVerilog, UVM, Python, C/C++, Linux, and Yocto. It supports collaboration with hardware teams and offers outcome-based engagements and royalty-based models, serving global semiconductor customers. With over 190 engineers across Bengaluru and Mysuru and global sales in the USA and Japan, Proxelera scales turnkey chip design projects.

Proxelera helps semiconductor teams reduce risk and accelerate silicon delivery with end-to-end product engineering. It delivers ASIC/SoC design, RTL, verification, FPGA prototyping, and embedded software, including IP design and post-silicon validation. The company performs physical design, fab interfacing, and silicon productization, leveraging SystemVerilog, UVM, Python, C/C++, Linux, and Yocto. It supports collaboration with hardware teams and offers outcome-based engagements and royalty-based models, serving global semiconductor customers. With over 190 engineers across Bengaluru and Mysuru and global sales in the USA and Japan, Proxelera scales turnkey chip design projects.
We are looking for a Senior / Principal ASIC Design Verification Engineer to lead hands-on verification of complex SoCs or large subsystems, owning execution from verification planning through tapeout and silicon correlation. This role requires deep UVM expertise and strong closure discipline.
Job Description:
If you’re seeking ownership of verification closure for silicon-critical designs and the opportunity to influence real SoC quality from pre-silicon to post-silicon, this role offers strong technical depth and impact.
Thanks,
Karthik Kumar
karthik.adasu@Proxelera.com