Proxelera helps semiconductor teams reduce risk and accelerate silicon delivery with end-to-end product engineering. It delivers ASIC/SoC design, RTL, verification, FPGA prototyping, and embedded…
AI ChipsChip DesignIP DesignNetworking SiliconProduct EngineeringSemiconductorsSilicon ValidationSystem Softwareproxelera.com
Proxelera
Proxelera helps semiconductor teams reduce risk and accelerate silicon delivery with end-to-end product engineering. It delivers ASIC/SoC design, RTL, verification, FPGA prototyping, and embedded…
AI ChipsChip DesignIP DesignNetworking SiliconProduct EngineeringSemiconductorsSilicon ValidationSystem Softwareproxelera.com
HQBengaluru, IN
Team Size124
Open Jobs5
Total Funding-
Latest FundraiseUnknown
Join the Team
RTL Design Engineer (ASIC RTL)
On-SiteBengaluru, Karnataka, IN
On-Site • Bengaluru, Karnataka, IN
5–10 years only
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Experience:
Client:
Proxelera ODC – Edge AI Video Processing Chip
This role is for engineers who live inside RTL, not around it.You will design real ASIC blocks that ship, not glue logic that gets forgotten. If micro-architecture to clean, timing-aware RTL is your comfort zone, this is your lane.
Work
• Own block-level RTL development in Verilog/SystemVerilog for ASIC designs
• Convert micro-architecture into synthesizable RTL with focus on area, latency, and power
• Design FSMs, pipelines, and datapaths used in production silicon
• Run and clean up CDC, Lint, and X-prop checks
• Collaborate closely with DV and synthesis teams to close design issues
Must-Have Experience
• Strong ASIC RTL coding experience (integration-only profiles will be rejected)
• Multiple ASIC RTL development projects end-to-end
• Hands-on CDC, Lint, X-prop cleanup
• FPGA-only experience will be discounted
• Synthesis or constraint knowledge is a plus, not mandatory
