
NeuReality makes AI inference significantly more cost- and energy-efficient for data centers, enterprises, and government deployments. The company designs purpose-built inference hardware and software, including the NR1 AI-CPU (NR1 Chip), NR Software, and NR1 Inference Appliances. Its stack integrates with GPUs, AI accelerators, and existing AI models to increase inference throughput and lower cost and power per token across on-premise, cloud, edge, and fog environments. NeuReality operates as a semiconductor and AI-infrastructure provider targeting organizations that need to deploy generative and agentic AI at scale.

NeuReality makes AI inference significantly more cost- and energy-efficient for data centers, enterprises, and government deployments. The company designs purpose-built inference hardware and software, including the NR1 AI-CPU (NR1 Chip), NR Software, and NR1 Inference Appliances. Its stack integrates with GPUs, AI accelerators, and existing AI models to increase inference throughput and lower cost and power per token across on-premise, cloud, edge, and fog environments. NeuReality operates as a semiconductor and AI-infrastructure provider targeting organizations that need to deploy generative and agentic AI at scale.
We are looking for a hands-on, experienced Physical Design Engineer to join us and help define and implement NeuReality’s next-generation AI SoC in an advanced technology node
You will play a key role in building and leading our physical design team, developing flows and methodologies, and driving the full RTL-to-GDSII implementation and signoff for one of the most advanced SoCs in the industry.
What You’ll Do
· Take part in shaping methodology and best practices in advanced technologies
· Drive end-to-end implementation: synthesis, P&R, timing closure, and signoff
· Collaborate closely with architecture and design teams on timing, floorplaning, partitioning, and power specification
· Define and optimize static timing constraints, area, and power goals at block and top levels
· Take part in flow development and automation to improve efficiency and quality of results
Requirements:
· BSC/MSC in Electrical/Computer Engineering
· 3+ years’ experience with RTL2GDS flow
· Deep understanding on STA principals, synthesis, and P&R flow
· Solid experience in physical verification and advanced process nodes
Advantages:
· Top level implementation and signoff
· Experience with DFT
· Managerial experience