NeuReality is seeking a Lead Networking Architect to help define and shape the next generation of our AI-SuperNIC scale-out chip.

Scale-out communication is a critical element in building competitive systems for modern data centers. We’re looking for an expert with deep networking experience to collaborate closely with our AI/ML, platform and driver software, and VLSI teams in designing an optimized scale-out networking architecture.

If you’re passionate about low-latency communication and have a strong background in RoCEv2, HPC communication, and NVMe-oF, this is a unique opportunity to take on a challenging and influential role.

This is a senior, high-impact position at the forefront of NeuReality’s technology innovation—driving the development of cutting-edge networking and AI acceleration solutions.

Responsibilities:

• Work closely with CTO and peer architects to define the product requirements and features of Neureality's next generation ultra low-latency AI-SuperNIC scale-out chip
• Lead adoption of new industry standards such as UEC, UALink while maintaining a competitive solution for RoCEv2
• Establish architecture guidelines, requirements, and the division of labor between software, firmware and hardware.
• Lead performance estimations, modeling, measurements, and optimizations, as well as system-level integration efforts.
• Engage directly with end customers and partners to shape use cases and system solutions.

Requirements:

• BSc/MSc in Electrical Engineering, Computer Science, or a related field
• 10+ years of experience working on large scale SoCs or NICs as an architect or senior designer
• Proven experience working with complex systems that integrate hardware, firmware, and software
• Excellent understanding of one or more of the following: UEC, UALink/NVLink, RoCEv2, NVMe-oF, IP networking, TCP/UDP protocols, network security, SHARP or INC