JD for Design and verification with GLS skill

Job Position: Design and verification engineer ( GLS)

Experience : 6 to 10+

Location: Bengaluru

Job type: Full Time

Job Duties:

• Technically lead a team of verification engineers on Sub-System Verification

• Architect the testbench and develop in UVM or Formal based verification approaches

• Define test plan and tests for block level verification

• Collaborate with design team on test plans, closure of code, and functional coverage

• Partner with analog co-sim and software team in enabling top level chip verification aspects

and developing end-to-end scenarios

• Bring up GLS setup, and drive issues faced in the same to closure

• Support post-silicon verification activities while working with other engineering teams

Competencies

• Verification experience with UVM and constrained random, coverage-based verification

Approaches:

• Knowledge of CPU architecture, Bus interconnects specially AXI/ACE/AHB/APB.

• Experience in building testbenches for ARM based subsystems

• Knowledge of assertion-based verification methods

• Experience in multi-clock, multi-power domain design, power-aware verification preferred

• Ability to lead and a team of engineers: Achieves focus on key priorities, provides clear

direction, actively communicates

• Should be able to take up challenge of a fast-paced, frequently changing environment

• Solid communication that is clear and concise

Qualifications:

• Bachelor’s or master’s degree in Computer Engineering, Communication,

Electrical/Electronic Engineering or related field, or equivalent

• 8+ years of experience in design verification including leading design verification teams

• Proven track record as SoC DV lead of verifying blocks/IP/Sub-system into high volume

production

Interested candidates can send there resume's to below mentioned mail I'd as well:

bhavana.r@blueberrysemi.com

sneha.d@blueberrysemi.com