About the role

We are seeking an exceptional Head of Hardware Engineering to lead the design, development, and validation of the hardware platforms underpinning our quantum computing technology.

This role will sit at the intersection of advanced semiconductor engineering and quantum device physics. You will oversee the full development cycle of FPGA-based control systems and mixed-signal cryo-CMOS chips used in our quantum hardware—from concept and design through fabrication, testing, and system integration—ensuring our quantum processors meet the performance, reliability, and scalability required for commercial quantum computing.

The successful candidate will combine deep technical expertise in FPGA/hardware and semiconductor development, with strong leadership skills, capable of guiding multidisciplinary teams within the hardware function, whilst working across R&D, device physics, nanofabrication, software, measurement and test.

Role responsibilities

Leadership & Strategy:

• Lead and develop a world-class hardware engineering organisation spanning chip design, cryogenic hardware, and quantum hardware system testing.

• Define and deliver the hardware engineering roadmap that underpins our quantum computing architecture and long-term scalability goals.

• Collaborate closely with quantum device physicists, and system integration teams to align semiconductor technology development with overall system performance targets.

• Foster a culture of innovation, technical excellence, and scientific rigor within the engineering team.

Design & Development:

• Oversee system design and modelling aspects of FPGA and cryo-CMOS based control systems used in our quantum computers.

• Produce design specifications for cryo-CMOS integrated circuits (chips) based on system level requirements.

• Oversee design and implementation of cryo-CMOS chips from specification to design and implementation, tape out, bring up and validation of devices.

• Oversee EDA tool flows within the hardware function; define tool roadmaps and work with vendors to procure appropriate tools in sufficient quantity.

• Oversee IP licencing of analog and digital IP for use in cryo-CMOS chips.

• Recruitment of high-quality candidates into the hardware team as SQC scales to build a Universal Scale Quantum Computer.

• Drive the development of control electronics, packaging, and cryogenic interfaces for qubit systems.

• Establish and maintain rigorous design review, documentation, and quality control processes.

Testing & Characterisation:

• Oversee the development of testing methodologies and infrastructure for chip validation and characterisation at cryogenic temperatures.

• Collaborate with quantum measurement teams to provide characterisation results of existing hardware and agree future performance targets.

• Drive continuous feedback loops between design, fabrication, and test teams to accelerate learning and iteration cycles.

Cryogenic hardware systems

• Oversee the design and build of prototypes for dilution refrigerator systems housing our quantum hardware.

Operational Leadership:

• Manage project timelines, budgets, and resource allocation across multiple hardware programs.

• Identify and mitigate technical and operational risks early in the development lifecycle.

• Champion cross-functional collaboration across quantum device physics, control systems, and software.

Your experience

Education & Experience:

• PhD or Master’s degree in Electrical Engineering, Semiconductor Physics, Materials Science, or a related field.

• 15+ years’ experience in semiconductor design, ideally with experience of mixed-signal IC development and advanced packaging technology.

• Proven experience leading multidisciplinary engineering teams in R&D or productisation of complex hardware systems.

Technical Expertise:

• Knowledge of semiconductor device physics, nanofabrication, and process integration.

• Experience with CMOS process technologies and their adaptation for quantum or cryogenic applications.

• Familiarity with quantum device design (spin, superconducting, or other qubit modalities) highly desirable.

• Strong understanding of low-temperature testing, high-frequency electronics, and system integration challenges in quantum systems.

• Experience with semiconductor EDA tools (e.g., Cadence, Synopsys) and cleanroom process equipment.

Leadership & Collaboration:

• Track record of building, mentoring, and leading high-performing technical teams.

• Strong communication skills with the ability to work effectively across scientific and engineering disciplines.

• Strategic thinker who can translate R&D outcomes into scalable engineering solutions.

• Comfortable working in a fast-paced, frontier technology environment with evolving requirements.

The recruitment process

For roles at SQC, expect 3-4 interviews, meeting a few members of the team and focusing on your core eligibility for the role, your skills and how they align, and finally your values and how they align. We'll give you a more specific runthrough if you're successful in making it to the first interview.

As part of our obligations to our clients, we require that successful candidates submit to background checks, including a National Police Check, Right to Work checks, as well as employment and qualifications verification. We won't contact anyone until we're confident there's a fit between SQC and yourself.

How to apply

The best and simplest way is to apply directly here, rather than messaging anyone on the SQC team directly. If you have any questions that you'd like answered before committing to applying, please feel free to email us at careers@sqc.com.au.

Please note

This position may require access to export-controlled information (ECI) subject to EAR and ITAR. Final employment decision is contingent upon satisfactory completion of export control screenings and obtaining any necessary export licenses or approvals, based on nationality, citizenship, and other factors considered by applicable export control regulations.