To make AI inference commercially viable, d-Matrix has built a new computing platform from the ground up: Corsair™, the world’s most efficient compute solution for AI inference at datacenter scale.…
To make AI inference commercially viable, d-Matrix has built a new computing platform from the ground up: Corsair™, the world’s most efficient compute solution for AI inference at datacenter scale.…
Series B announced to commercialize inference compute platform.
Series C- 2025-11-12
$275,000,000
Round reported to bring total raised to $450M and value the company at $2 billion.
Founders
What we do
Join the Team
Hardware Engineering Intern
On-SiteSan Francisco Bay Area, US
On-Site • San Francisco Bay Area, US
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Who you are
Current Student: Pursuing a BS, MS, or PhD in Electrical Engineering, Computer Engineering, or Computer Science
PCB Fundamentals: Basic understanding of PCB design flow (Schematic -> Layout -> Fabrication) and familiarity with at least one EDA tool (Allegro, Altium, or KiCad)
Programming Skills: Strong proficiency in Python. Experience with APIs, data parsing (JSON/XML), or automated tool-chaining is highly preferred
First-Principles Thinking: A passion for challenging the status quo of "how things have always been done" in hardware design
Familiarity with AI/ML concepts, particularly Reinforcement Learning or Generative Models applied to physical design
Experience with GitHub and version control for hardware projects
Exposure to high-speed design concepts (PCIe, DDR, SerDes)
What the job involves
Benefits
Equity
Health care
Flexible time-off
Paid paternity leave
401k retirement plan
Remote & hybrid working model
Work with world-leading engineers and researchers
Peer coaching & development
Team-building activities
Happy hours
Free food and snacks
Startup jobs. A lot of them.
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At d-Matrix, we are building the future of AI compute
To do that faster, we need to rethink how hardware is designed
We are looking for a forward-thinking Hardware Engineering Intern to join our team and focus on the cutting edge of EDA (Electronic Design Automation) and AI-driven layout
Your mission will be to evaluate, integrate, and automate PCB layout workflows using emerging AI-agent technologies and generative AI design tools
You will bridge the gap between traditional hardware design and the future of automated, agentic workflows
AI Tool Evaluation: Lead the internal evaluation of AI-driven layout platforms
Benchmarking their ability to handle high-speed constraints, complex stack-ups, and power delivery requirements against traditional manual routing
Workflow Automation: Develop scripts (Python, SKILL, or TCL) to bridge the gap between d-Matrix’s standard EDA tools (Cadence Allegro/OrCAD) and AI layout agents
PCB Design Support: Assist Senior Layout Engineers in preparing design data (schematics, netlists, and constraint files) for automated routing engines
Constraint Translation: Work on "translating" complex hardware constraints (differential pairs, length matching, and Z_{target} for PDN) into formats that AI agents can ingest and execute accurately
Performance Analysis: Conduct post-layout analysis on AI-generated designs, comparing Signal Integrity (SI) and Power Integrity (PI) metrics against human-designed baselines
