Normal Computing | Incredible Opportunities The Normal Team builds foundational software and hardware that help move technology forward - supporting the semiconductor industry, critical AI infrastructure, and the broader systems that power our world. We work as one team across New York, San Francisco, Copenhagen, Seoul, and London.

Your Role In Our Mission You will define and implement architecture and microarchitecture for novel AI compute blocks at Normal Computing. This role sits at the intersection of machine learning algorithms, computer architecture, and RTL implementation—you'll need to understand modern AI workloads deeply enough to make intelligent hardware design decisions, then implement those designs in production-quality RTL.

Responsibilities

• Define microarchitecture for novel AI accelerator blocks, collaborating closely with architecture and research teams to translate algorithmic requirements into efficient hardware implementations
• Write high-quality RTL in SystemVerilog for core logic, datapaths, and control structures optimized for AI/ML workloads
• Stay current with state-of-the-art AI algorithms and architectures, understanding their computational patterns and hardware implications
• Analyze existing AI accelerator architectures and apply lessons learned to new design problems
• Work with DV team on digital verification for assigned designs, including testbench development, debugging, coverage, and signoff
• Work with physical design engineers to ensure RTL is implementable, performant, and aligned with layout constraints
• Contribute to functional or performance models to support early exploration, validation, and design tradeoff analysis
• Participate in design reviews, verification reviews, and cross-functional debug from concept through silicon

This role requires both breadth (understanding the AI accelerator landscape) and depth (implementing complex digital logic). You should be comfortable reading ML research papers and reasoning about their hardware implications, while also being hands-on with RTL coding, verification, and physical design constraints.

What Makes You A Great Fit

• BS, MS, or PhD in Electrical / Electronic Engineering, Computer Engineering, Computer Science, or a related field
• Experience in digital logic design for AI/ML accelerators or compute architectures
• Deep understanding of modern AI algorithms and architectures, including transformer models, diffusion models, mixture of experts, and other generative AI methods
• Strong knowledge of existing AI accelerator architectures (e.g., TPU, Cerebras, Graphcore, Groq, etc.) and the algorithmic/architectural tradeoffs they embody

Bonus Points For

• PhD or research experience in AI/ML hardware acceleration, computer architecture, or related areas
• Experience implementing novel sparse computation, dataflow architectures, or specialized memory hierarchies for AI workloads
• Contributions to AI accelerator research (publications, open-source projects, or prototype systems)
• Background in functional or performance modelling to support architecture exploration or validation
• Understanding of ML frameworks (PyTorch, JAX, etc.) and their hardware implications

Equal Employment Opportunity Statement Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status. Accessibility Accommodations Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accomodations@normalcomputing.ai.