Semifive India Design Centre, headquartered in Bangalore, is our rapidly growing capability centre that plays a pivotal role in delivering complex SoC programs for global customers. The India team is at the forefront of RTL-to-GDS design execution, IP creation, and turnkey silicon delivery, working closely with worldwide teams to bring next-generation SoCs to production.

Key Responsibilities

• First Physical design leadership hire in Semifive India.
• Leadership & Program Ownership
• Lead and scale the Physical Design organization in India, managing a team of logic implementation(Synthesis) , PnR, STA, and physical verification leads and engineering execution
• Own execution for multiple SoC programs (3–4 concurrently) spanning Turnkey, Platform, and Customer-specific ASICs.
• Drive planning, execution, and delivery across front-end to signoff, ensuring predictable schedule and quality metrics.
• Execution & Technical Ownership
• Define and own the physical implementation strategy for advanced technology nodes (e.g. 7nm, 5nm, 8lpu, 2nm).
• Guide teams on floorplanning, partitioning, power planning, clock tree synthesis (CTS), routing, timing closure, EMIR, and DRC/LVS signoff.
• Collaborate closely with DFT, STA, Power, Package, and Foundry teams to ensure seamless integration and tapeout readiness.
• Drive timing, power, and area optimisation trade-offs across multiple SoC programs.
• Ensure physical design signoff (timing, power integrity, reliability, and manufacturability) for all programs.
• Customer & Cross-site Collaboration
• Act as a technical and program interface with customer engineering teams across Europe, US, and India.
• Represent Semifive India in customer design reviews, milestone tracking, and technical discussions.
• Work closely with global Program Management, Design, and Foundry interface teams to ensure successful execution of Turnkey programs.
• People & Process Development
• Build, mentor, and grow a high-calibre physical design team with strong technical and leadership depth.
• Establish best-in-class methodology, flow, and automation for predictable and scalable execution.
• Partner with global PD and CAD teams to harmonize flows and enhance productivity.
• Drive a culture of quality, ownership, and continuous improvement in all aspects of design delivery.

Qualifications

• Bachelor’s or Master’s in Electrical / Electronics / VLSI Engineering.
• 15+ years of experience in ASIC physical design, with at least 5 years in leadership roles managing large SoC programs and teams.
• Proven track record of successfully taping out multiple complex SoCs (≥100M gates, multi-voltage domains, multiple clocking architectures).
• Expertise in PnR flows using Synopsys ICC2, Cadence Innovus, or equivalent toolchains.
• Strong understanding of timing analysis (PrimeTime), EMIR (Redhawk, Voltus), and physical verification (Calibre, Pegasus).
• Experience in turnkey ASIC programs, managing across RTL, DFT, STA, and Signoff interfaces.
• Deep familiarity with advanced process technologies (12nm and below) and their associated physical design challenges.
• Excellent program management, leadership, and communication skills, with the ability to lead across multiple geographies.

Why Join Us?

At Semifive, you will be part of a fast-growing global semiconductor solutions company that is redefining how custom SoCs are designed and brought to market. Joining our Bangalore team means leading state-of-the-art physical design execution for next-generation chips that power tomorrow’s innovations.

You will work directly with world-class engineering teams and customers across continents, influence the methodology, architecture, and execution strategy, and shape the growth of Semifive India’s backend design capability.

We offer a collaborative, agile, and empowering environment that values innovation and ownership. Your leadership will directly impact the delivery of complex silicon programs and the growth trajectory of Semifive in India.