Role Overview

• Design Verification Engineer with expertise in System Verilog, UVM methodology.
• Experience in ASIC-Memory Design methodology.
• DDR protocol knowledge is preferable.
• This engineer shall collaborate with architects and designers to meet performance and reliability requirements.
• Mixed signal verification.

Must Have

• Master’s degree in Electrical Engineering, Computer Engineering.
• 5+ years of experience in ASIC/DRAM/NAND/NOR Memory design verification
• Strong skills in SystemVerilog and UVM methodology.
• Cadence tool chain knowledge (Virtuoso, ADE, Xcelium, Simvision) or equivalent Synopsys verification tool chain.
• Problem Solving and Communication skills.

Responsibilities

• Develop and maintain UVM-based verification environments.
• Create test plans, testbench and stimuli.
• Create analogue blocks and memory models.
• Execute both block and system levels verification.
• Simulate and debug using Cadence/Synopsys tools for design inspection.
• Verify and validate DDR4/DDR5 command user interface of the memory.
• Verify and validate internal Memory core.
• RTL coverage and gate level simulation with SDF back-annotation for timing closure checks.

Your profile

• Master’s degree in Electrical Engineering, Computer Engineering.
• 5+ years of experience in ASIC/DRAM/NAND/NOR Memory design verification
• Strong skills in SystemVerilog and UVM methodology
• Experience in DDR4, LPDDR4/5, or DDR5 is preferrable.
• Cadence tool chain knowledge (Virtuoso, ADE, Xcelium, Simvision) or equivalent Synopsys verification tool chain.

Ideal fit

• Asic design and mixed signal verification knowledge preferably in memory design
• System Verilog and UVM methodology experience.
• Cadence verification tool chain experience (Virtuoso Schematic Entry, ADE, Xcelium, Simvision)
• Programming and scripting skill (linux commands, tcl, python)
• Problem solving attitude.

About Us Ferroelectric Memory GmbH (FMC) is a pioneering semiconductor company based in Dresden, Germany, focused on next-generation non-volatile memory technology.

Founded in 2016, FMC is at the forefront of innovation in ferroelectric memory, enabling faster, more energy-efficient, and scalable solutions for future computing systems.

Our team combines deep expertise in semiconductor physics, device engineering, and system design to redefine memory architectures for emerging applications in AI, IoT, and high-performance computing.

Join us and be part of a team shaping the future of memory technology.

Why FMC?

• Cutting-edge memory technology
• Strong presence in the Dresden semiconductor ecosystem
• High ownership and impact-driven roles
• International and collaborative team
• Direct contribution to AI and next-generation computing