TITLE: Design Verification Engineer (Principal/SMTS)

LOCATION: GREATER BENGALURU AREA

Company Description

We are looking for exceptional talent and leadership to join Fast Growing Startup into Scalable Intelligence, the world’s first company developing Agentic Silicon for powering the future of AI.

Founded in 2023, We have deep customer engagements across America, Europe, and Asia, and demonstrated functional prototypes to prove our concept and vision.

Job Description:

You will be working on server class ARM CPUSS sub-system verification at block and SoC level . The task list includes, but is not limited to, testplan development, env development, checker/scoreboard development, test execution and analysis at sub-system, chiplet and multi-chiplet level.

OR

You will be working on High performance Ethernet at sub-system and SoC level. The task list includes, but is not limited to, testplan development, env development, checker/scoreboard development, test execution and analysis at sub-system, chiplet and multi-chiplet level

OR

You will be working on end-to-end data-path verification for high-performance ARM-based SoCs. This role focuses on validating correctness, coherency, performance, and scalability of data movement across PCIe and CXL fabrics, from IP blocks through interconnect to CPUs and memory, at chip and multi-chip system levels.

OR

You will be working on high performance UCIe controllers at block and SoC level . The task list includes, but is not limited to, testplan development, env development, checker/scoreboard development, test execution and analysis at sub-system, chiplet and multi-chiplet level

OR

You will be working on Memory and Networking Encryption at sub-system and SoC level for high performance high throughput flows. The task list includes, but is not limited to, testplan development, env development, checker/scoreboard development, test execution and analysis at sub-system, chiplet and multi-chiplet level

Required qualifications

• Bachelor’s or Master’s degree in Electrical/Electronics Engineering/Science with 11-14(SMTS) or 14+(Principal) years of relevant experience
• Must have strong expertise with SV/UVM methodology and/or C/C++ based verification with 5yrs+ hands-on experience in IP/sub-system and/or SoC level verification
• Experience in development of UVM based verification environments from scratch.

Contact

Sumit S. B.

sumit@mulyatech.com

www.mulyatech.com

"Mining the Knowledge Community"

Practice Head(Talent Acquisition. Semiconductors Domain)