Key Responsibilities

• Define, document, develop, and execute RTL verification tests and coverage for highly parameterized IPs using Python and C++, compatible with major RTL simulators (e.g., Cadence, Synopsys).
• Maintain and improve the verification workflow, refine metrics, and increase automation.
• Implement verification components such as BFMs or monitors used in verification test benches.

Experience & Qualifications

• 2+ years of industry experience as a Verification Engineer.
• Good understanding of hardware RTL design and verification languages (VHDL, Verilog, SystemC, C++, Python, SystemVerilog).
• Experience in the use and development of verification methods and infrastructure (VIPs, UVM, testbeds, EDA tools).
• Experience in formal proof verification methodology is a plus.
• Experience with shell scripting.
• Knowledge of interconnect technology is a plus.
• Understanding of hardware communication protocols (AMBA, OCP, or others).
• Strong written and verbal communication skills in French and English.
• Curious, autonomous, rigorous, and results-oriented, with a commitment to quality and a thorough approach to work.
• Proven ability to work effectively in a team environment.

Education

• Master’s degree or Doctorate in Engineering, Computer Science, or a related field.

Languages

• Fluent in French and English.

If you are interested please send over your CV to tee@microtech-global.com