Astrus

Astrus is developing AI to automate analog layout on the microchip level. The current analog layout process is manual, time-consuming, and iterative, with engineers spending hours on simple circuits and weeks on complex ones. As transistors shrink, the complexity of Design Rule Check (DRC) and layout sensitivity increases, making the process even more challenging. Astrus aims to streamline this by automating the placement of components and routing of wires, significantly reducing design time and iterations for microchip manufacturers.

AIAnalog LayoutAutomationDRCEDAMicrochip Designastrus.ai

Astrus

AIAnalog LayoutAutomationDRCEDAMicrochip Designastrus.ai

HQToronto, CA

Team Size20

Open Jobs5

Total Funding$11M

Latest Fundraise7 months ago

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Computational Physics Engineer

On-SiteToronto, Ontario, CA

On-Site • Toronto, Ontario, CA

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Product Designer

ContractCambridge, GB

Contract • Cambridge, GB

Frontend Developer

Full-timeMunich, DE

Full-time • Munich, DE

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Contract • Utrecht, NL

AI Researcher

Part-timeNew York, US

Part-time • New York, US

Software Engineer

ContractBelgrade, RS

Contract • Belgrade, RS

Frontend Developer

Part-timeRotterdam, NL

Part-time • Rotterdam, NL

Astrus

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Computational Physics Lead

About Astrus 📍 Location: Toronto or Waterloo, Canada At Astrus, we are using AI to automate microchip design, starting with the biggest bottleneck, analog layout. Our mission is to radically improve global computation and empower chip designers to create the world's most advanced microchips with AI. Astrus is backed by top-tier VC firms: Khosla Ventures, HOF Capital, and 1517 Fund.

About The Role As the Computational Physics Lead, you will take charge of designing and developing the core simulation software that guides our AI-powered microchip design platform. This software will evaluate millions of AI-generated analog layouts, scoring them based on performance metrics grounded in the physics of electronics, solid-state physics, and semiconductor manufacturing.

This role requires a deep understanding of computational physics and the ability to model electrical phenomena in software. You will collaborate closely with our AI, development, and chip design leads to ensure seamless integration into the broader AI system.

What You Will Do

Lead the development of high-performance, physics-based simulation software to evaluate analog layouts at scale, ensuring speed, precision, and accuracy.
Develop and optimize parasitic extraction models to simulate and assess electrical characteristics such as resistance and capacitance based on the physical properties of AI-generated layouts.
Collaborate with the AI, software, and chip design teams to ensure that simulation models are integrated effectively.
Work closely with the Analog Design Lead to align simulation models with real-world circuit behaviors.
Design methodologies for performance evaluations, ensuring AI-generated layouts meet industry standards.

Who You Are

Expert in computational physics or a related field with a deep understanding of numerical methods, simulations, and high-performance computing.

Ready to radically improve global computation? 🚀📈 🌎 🤖 Reach out to careers@astrus.ai or Steph Hector for more details

Continuously explore and implement innovations in computational modeling techniques, improving simulation efficiency and accuracy as the product evolves.

Optimize simulation performance in high-performance computing environments, ensuring the system can handle large-scale analog layout simulations efficiently.

Experience in multiphysics simulations or modeling complex physical systems, such as electrical, thermal, or material properties, ideally within a high-performance environment.

Strong background in numerical methods and optimization, with experience in techniques like finite element analysis (FEA) or finite difference methods (FDM).

Proficiency in programming languages such as C++, Rust, or Python, and frameworks like MPI, CUDA, or OpenMP for parallel computing.

High-performance computing (HPC) experience, with a demonstrated ability to scale and optimize complex simulations across distributed computing systems.

Familiarity with semiconductor physics, parasitic extraction, or circuit simulations is a plus but not required. Candidates from other simulation-heavy fields (e.g., computational fluid dynamics, quantum mechanics, or material science) are encouraged to apply.

Strong ability to collaborate across disciplines, working closely with AI and chip design teams to integrate physical models into the overall design process.

Holds a Master’s or PhD in Computational Physics, Applied Mathematics, or a related field.

Passionate about driving innovations that contribute to the future of microchip design and the broader field of global computation.