BITSILICA

BITSILICA is a rapidly growing global semiconductor design services organization with over 500 professionals serving 25+ clients across India, USA, Singapore, Malaysia, and Vietnam. They specialize in both semiconductor (Semicon) and embedded systems design and development. Their Semicon services include IP/SoC Verification, ASIC/RTL Design, Physical Design & STA, FPGA Design, and Design for Testability. For embedded systems, they offer Device Drivers, Multimedia, Automotive, Modem, and Internet of Things solutions. The company is ISO 9001:2015 certified and collaborates with universities for research. They aim to deliver high-quality, innovative technology solutions and build a world-class company.

ASICEmbedded SystemsFPGAPhysical DesignRTL DesignSemiconductor DesignSoCVerificationbitsilica.com

BITSILICA

ASICEmbedded SystemsFPGAPhysical DesignRTL DesignSemiconductor DesignSoCVerificationbitsilica.com

HQHyderābād, IN

Team Size343

Open Jobs8

Total Funding-

Latest FundraiseUnknown

Join the Team

BITSILICA - Senior Physical Design Lead/Manager - SoC/RTL

On-SiteBengaluru, Karnataka, IN

On-Site • Bengaluru, Karnataka, IN

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Key Responsibilities

Lead SoC/IP physical implementation through all stages of the RTL-to-GDSII flow for advanced nodes (7nm and below).
Drive PPA (Power, Performance, Area) optimization at block and top levels.
Own floorplanning, placement, CTS, routing, and signoff activities to meet design targets.
Perform STA, IR/EM analysis, and integrate power intent using UPF.
Ensure full physical verification (DRC/LVS) closure using industry-standard EDA tools.
Manage ECO implementation, timing closure, and final tapeout preparation.
Guide and mentor a team of physical design engineers; provide technical leadership throughout the project lifecycle.
Work closely with RTL, DFT, synthesis, verification, and architecture teams to resolve cross-functional issues.
Prepare project plans, track execution, and ensure delivery milestones are met.
Identify and implement flow improvements, automation, and best practices for efficiency.

Required Skills & Experience

Preferred Qualifications

Prior experience leading multiple successful tapeouts.
Knowledge of advanced packaging, multi-die integration, or chiplet-based design.
Exposure to cloud-based EDA workflows.

(ref:hirist.tech)