Company Description
Chip Smart Technologies is a rapidly growing design services company that specializes in high-quality VLSI design solutions, enabling technological innovation and enhancement. With a mission to deliver cutting-edge semiconductor design services, we focus on aligning technical excellence with client needs to drive impactful outcomes. Our team comprises highly skilled professionals with expertise across all areas of VLSI design. Recognized for our precision and client-centric approach, we navigate every aspect of the design lifecycle, fostering innovation and strengthening industry partnerships. Headquartered in Bengaluru South, we are committed to shaping the future of semiconductor technology.
Role Description
This is a full-time, on-site role located in Bengaluru South for an Analog Mixed Signal Layout Engineer. The role involves designing and executing precise analog and mixed-signal layouts, collaborating closely with design teams, and ensuring compliance with design rules and performance requirements. The engineer will perform LVS (Layout versus Schematic) and DRC (Design Rule Check) verification, resolve layout issues, and optimize layouts for area, power, and performance. Additionally, the individual will contribute to the design process by leveraging industry-standard EDA tools while maintaining documentation for layouts.
Qualifications
- Proficiency in Analog and Mixed-Signal Layout techniques, including understanding parasitics and electromigration effects
- Experience with Electronic Design Automation (EDA) tools such as Cadence Virtuoso, Mentor Calibre, or equivalent for layout and verification
- Strong skills in LVS (Layout versus Schematic) and DRC (Design Rule Check) analysis and debugging
- Knowledge of Process Design Kits (PDKs) and semiconductor fabrication technologies like CMOS and FinFET
- Strong analytical and problem-solving skills with attention to detail
- Educational qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or a related field
