The compiler team is developing an automated optimization process that adapts our unique hardware architecture to run any high-performance computing application, with little to no code modifications required. By using iterative rounds of telemetry and optimization, our compiler is able to intelligently adapt our accelerator into a workload-specific ASIC, at runtime.

Requirements

• BSc, MSc, or PhD in computer science, computer engineering, or a related field.
• 2+ years as a team leader.
• 6+ years of experience as a software engineer.
• Strong coding skills in C and C++ programming languages.
• Strong algorithmic intuition with control flow graphs and code analysis.
• Previous experience in one of the following areas: compiler optimizations, static analysis, code graph algorithms, mathematics.
• Familiarity with LLVM and/or MLIR: big advantage.
• Strong design and analytical skills.
• Excellent leadership and collaboration skills.

Responsibilities

• Lead a heterogeneous team of MLIR compiler engineers with various levels of experience.
• Define feature development scope and plan for successful product delivery.
• Set expectations with software, architecture, and hardware stakeholders.
• Balance high-quality product delivery under extremely tight schedules while fostering long-term innovation.
• Serve as the technical leader when design directions are unclear.
• Navigate and solve engineering problems when team members have conflicting points of view.