FuriosaAI

FuriosaAI is an AI chip company developing data center accelerators focused on efficient AI inference for large language models (LLMs) and multimodal applications. Their flagship product, RNGD (Gen 2), is designed with a proprietary Tensor Contraction Processor (TCP) architecture to achieve high performance and efficiency, targeting lower total cost of ownership. The company also offers the Gen 1 Vision NPU for computer vision tasks. FuriosaAI provides a comprehensive software stack, including the Furiosa SDK, to optimize and deploy AI models. They emphasize programmability, efficiency, and ease of use, aiming to make AI computing more sustainable. The company has a global presence with R&D headquarters in Seoul, Korea, and hubs in the US and Germany.

AI AcceleratorsData CenterEfficiencyFull-Stack AILLM InferenceNPUSustainabilityTensor Contraction Processorfuriosa.ai

FuriosaAI

AI AcceleratorsData CenterEfficiencyFull-Stack AILLM InferenceNPUSustainabilityTensor Contraction Processorfuriosa.ai

HQUndisclosed

Team Size154

Open Jobs40

Total Funding$266M

Latest Fundraise8 months ago

Join the Team

AI Chip Architect

On-SiteSeoul, Seoul, KR

On-Site • Seoul, Seoul, KR

Teeming tracks opportunities at over 24,000 AI startups, then works with you to find (and land) the one you'll love.

Frontend Developer

ContractNovi Sad, RS

Contract • Novi Sad, RS

DevOps Engineer

Part-timeMunich, DE

Part-time • Munich, DE

Software Engineer

Full-timeNew York, US

Full-time • New York, US

Software Engineer

Full-timeCambridge, GB

Full-time • Cambridge, GB

Product Designer

InternshipTel Aviv

Internship • Tel Aviv

Data Scientist

Part-timeSan Francisco, US

Part-time • San Francisco, US

Responsibilities

Define architecture/microarchitecture specifications. Take ownership of one or more chip modules and implement them in RTL.
Converge functionality and PPA of the design.
Implement your designs in RTL (System Verilog or other HDLs) and iterate the design for optimal power, timing, and area.
Create simple test benches and debug complex logic simulations.

Minimum Qualifications

Master's degree in Electrical Engineering, Computer Science or equivalent practical experience.
2+ years of industry experience in chip design, specializing in RTL design (architecture and implementation), logic synthesis, verification, and timing closure
Experience in microprocessor simulator implementation in depth with C++ or other high-level languages
Experience in modeling PPA of the design
Experience in scripting languages to automate simulation and analysis

Preferred Qualifications

Ph.D in Electrical Engineering, Computer Science or equivalent practical experience is a plus
Experience in accelerator design is a plus
Experience with highly pipelined designs, and with multiple-clock-domain designs.
Knowledge of machine learning algorithms, compiler, processor design, accelerators, and/or memory hierarchies.
Experience with Chisel or RISC-V is a plus

Contact

recruit@furiosa.ai