DVCon
DVCon helps engineers understand practical ways to design and verify complex electronic systems. It focuses on languages and tools used to build ICs, including SystemVerilog, Verilog, VHDL, SystemC, and related software. The conference covers verification methodologies, AI and machine learning aids, open-source software, hardware/software co-verification, and security. It is a B2B professional event with attendees such as chip designers, verification engineers, and IP integrators, and it highlights industry methods, reference flows, and IP-based SoC design. DVCon operates as a sponsorship-supported event that brings together industry professionals to share experiences and advancements.
DVCon
DVCon helps engineers understand practical ways to design and verify complex electronic systems. It focuses on languages and tools used to build ICs, including SystemVerilog, Verilog, VHDL, SystemC, and related software. The conference covers verification methodologies, AI and machine learning aids, open-source software, hardware/software co-verification, and security. It is a B2B professional event with attendees such as chip designers, verification engineers, and IP integrators, and it highlights industry methods, reference flows, and IP-based SoC design. DVCon operates as a sponsorship-supported event that brings together industry professionals to share experiences and advancements.