Astrus
Astrus is developing AI to automate analog layout on the microchip level. The current analog layout process is manual, time-consuming, and iterative, with engineers spending hours on simple circuits and weeks on complex ones. As transistors shrink, the complexity of Design Rule Check (DRC) and layout sensitivity increases, making the process even more challenging. Astrus aims to streamline this by automating the placement of components and routing of wires, significantly reducing design time and iterations for microchip manufacturers.
Astrus
Astrus is developing AI to automate analog layout on the microchip level. The current analog layout process is manual, time-consuming, and iterative, with engineers spending hours on simple circuits and weeks on complex ones. As transistors shrink, the complexity of Design Rule Check (DRC) and layout sensitivity increases, making the process even more challenging. Astrus aims to streamline this by automating the placement of components and routing of wires, significantly reducing design time and iterations for microchip manufacturers.