
Agile Analog is transforming the world of analog IP with its configurable, multi-process technology called Composa™. This technology automatically generates analog IP tailored to customer specifications, optimizing designs, simplifying SoCs, and reducing custom development costs. They offer solutions and subsystems for Data Conversion (ADCs, DACs), Power Management (LDOs, PORs, PMUs), IC Monitoring (IR Drop Detectors, Comparators, Temperature Sensors, PVT Subsystems), Security (Voltage Glitch Detectors, Clock Attack Monitors), and Always-On IP (BandGap References, LDOs, RC Oscillators, SMUs). Agile Analog's approach allows for IP to be generated fresh for each customer, optimized for their specific process node and features, integrating more analog functions than ever before. Their IP is compatible with major foundries and aims to accelerate innovation in semiconductor design for applications like HPC, IoT, AI, automotive, and aerospace.

Agile Analog is transforming the world of analog IP with its configurable, multi-process technology called Composa™. This technology automatically generates analog IP tailored to customer specifications, optimizing designs, simplifying SoCs, and reducing custom development costs. They offer solutions and subsystems for Data Conversion (ADCs, DACs), Power Management (LDOs, PORs, PMUs), IC Monitoring (IR Drop Detectors, Comparators, Temperature Sensors, PVT Subsystems), Security (Voltage Glitch Detectors, Clock Attack Monitors), and Always-On IP (BandGap References, LDOs, RC Oscillators, SMUs). Agile Analog's approach allows for IP to be generated fresh for each customer, optimized for their specific process node and features, integrating more analog functions than ever before. Their IP is compatible with major foundries and aims to accelerate innovation in semiconductor design for applications like HPC, IoT, AI, automotive, and aerospace.
Headquarters: Cambridge, United Kingdom
Founded: 2017
Core tech: Composa™ configurable multi-process analog-IP generation
Product areas: Data conversion, power management, IC monitoring, security, always-on subsystems
Recent notable funding: Series A $19M led by OMERS Ventures (May 2021)
Reduces custom analog development time and cost; simplifies integration of analog IP into SoCs across multiple foundries and process nodes.
2017
DeepTech
5,000,000
Investors reported: Delin Ventures, firstminute Capital, MMC Ventures
19,000,000
Round led by OMERS Ventures
“Delin Ventures, Firstminute Capital, MMC Ventures, OMERS Ventures, IQT”